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https://github.com/ggml-org/llama.cpp.git
synced 2026-07-21 10:15:53 +00:00
opencl: disable FA and MoE weights repack to work around compiler issues for Adreno 850 GPU (#25745)
* opencl: workaround for A850 compiler compat * opencl: fix DX compiler version parsing and cleanup --------- Co-authored-by: Li He <lih@qti.qualcomm.com>
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@@ -123,6 +123,7 @@ enum ADRENO_GPU_GEN {
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enum ADRENO_CL_COMPILER_TYPE {
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E031,
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E17,
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DX,
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};
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@@ -264,7 +265,8 @@ static ADRENO_GPU_GEN get_adreno_gpu_gen(const char *device_name) {
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}
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if (strstr(device_name, "830") ||
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strstr(device_name, "840")) {
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strstr(device_name, "840") ||
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strstr(device_name, "850")) {
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return ADRENO_GPU_GEN::A8X;
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}
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@@ -288,6 +290,17 @@ static ggml_cl_compiler_version get_adreno_cl_compiler_version(const char *drive
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size_t compiler_minor_offset = 8;
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size_t compiler_patch_offset = 11;
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if (compiler_ver_pos == std::string::npos) {
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compiler_ver_pos = driver_ver_str.find("E17");
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if (compiler_ver_pos != std::string::npos) {
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type = ADRENO_CL_COMPILER_TYPE::E17;
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compiler_ver_len = 12;
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compiler_major_offset = 4;
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compiler_minor_offset = 7;
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compiler_patch_offset = 10;
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}
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}
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if (compiler_ver_pos == std::string::npos) {
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compiler_ver_pos = driver_ver_str.find("DX");
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if (compiler_ver_pos == std::string::npos) {
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@@ -296,6 +309,8 @@ static ggml_cl_compiler_version get_adreno_cl_compiler_version(const char *drive
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type = ADRENO_CL_COMPILER_TYPE::DX;
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compiler_ver_len = 11;
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compiler_major_offset = 3;
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compiler_minor_offset = 6;
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compiler_patch_offset = 9;
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}
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std::string compiler_ver_str = driver_ver_str.substr(compiler_ver_pos, compiler_ver_len);
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@@ -1655,6 +1670,7 @@ static void load_cl_kernels(ggml_backend_opencl_context *backend_ctx) {
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// those compiler versions since it is anyway not used for Adreno.
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if (backend_ctx->gpu_family != ADRENO ||
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backend_ctx->adreno_cl_compiler_version.newer_than_or_same(E031, 38, 11, 0) ||
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backend_ctx->adreno_cl_compiler_version.type == E17 ||
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backend_ctx->adreno_cl_compiler_version.type == DX) {
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#ifdef GGML_OPENCL_EMBED_KERNELS
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const std::string kernel_src {
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@@ -6946,6 +6962,15 @@ inline bool use_adreno_kernels(const ggml_backend_opencl_context *backend_ctx, c
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return threashold_ok;
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}
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static bool adreno_e17_compiler_quirks(const ggml_backend_opencl_context *backend_ctx) {
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if (!backend_ctx || backend_ctx->gpu_family != GPU_FAMILY::ADRENO ||
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backend_ctx->adreno_cl_compiler_version.type != ADRENO_CL_COMPILER_TYPE::E17) {
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return false;
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}
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const char * env = getenv("GGML_OPENCL_ADRENO_E17_QUIRKS");
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return !(env && env[0] == '0');
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}
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inline bool use_adreno_moe_kernels(const ggml_backend_opencl_context *backend_ctx, const ggml_tensor *tensor) {
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// The moe weight repack kernels *_trans4_ns alias a private ushort8 through a uchar*.
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// Certain compilers (found with some A7x and A6x) miscompiles this, corrupting the weights.
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@@ -6957,6 +6982,11 @@ inline bool use_adreno_moe_kernels(const ggml_backend_opencl_context *backend_ct
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backend_ctx->adreno_gen == ADRENO_GPU_GEN::ADRENO_UNKNOWN)) {
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return false;
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}
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if (adreno_e17_compiler_quirks(backend_ctx)) {
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return false;
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}
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int ne01 = tensor->ne[1];
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return (((strstr(tensor->name, "ffn") != NULL) && (strstr(tensor->name, "exps") != NULL)) || (strstr(tensor->name, "as") != NULL)) && (ne01 % 32 == 0);
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}
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@@ -7289,6 +7319,10 @@ static bool ggml_opencl_supports_op(ggml_backend_dev_t dev, const struct ggml_te
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case GGML_OP_MEAN:
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return op->src[0]->type == GGML_TYPE_F32;
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case GGML_OP_FLASH_ATTN_EXT: {
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// The E17 compilers segfault while building FA kernels, skip E17 for now
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if (adreno_e17_compiler_quirks(backend_ctx)) {
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return false;
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}
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const ggml_tensor * q = op->src[0];
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const ggml_tensor * k = op->src[1];
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const ggml_tensor * v = op->src[2];
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@@ -274,8 +274,9 @@ kernel void kernel_gemm_moe_mxfp4_f32_ns(
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shared_b[b_local_offset.y] = bx8_f16.hi;
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// Dequantization
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reg_a.lo = mxfp4_to_fp16_packed8(as_ushort2(mxfp4x16.lo)) * s;
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reg_a.hi = mxfp4_to_fp16_packed8(as_ushort2(mxfp4x16.hi)) * s;
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// Cast the e8m0 scale to half to satisfy E17 compilers
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reg_a.lo = mxfp4_to_fp16_packed8(as_ushort2(mxfp4x16.lo)) * (half)s;
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reg_a.hi = mxfp4_to_fp16_packed8(as_ushort2(mxfp4x16.hi)) * (half)s;
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sub_group_barrier(CLK_LOCAL_MEM_FENCE);
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@@ -304,8 +305,9 @@ kernel void kernel_gemm_moe_mxfp4_f32_ns(
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shared_b[b_local_offset.y] = bx8_f16.hi;
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// Dequantization
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reg_a.lo = mxfp4_to_fp16_packed8(as_ushort2(mxfp4x16.lo)) * s;
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reg_a.hi = mxfp4_to_fp16_packed8(as_ushort2(mxfp4x16.hi)) * s;
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// Cast the e8m0 scale to half to satisfy E17 compilers
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reg_a.lo = mxfp4_to_fp16_packed8(as_ushort2(mxfp4x16.lo)) * (half)s;
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reg_a.hi = mxfp4_to_fp16_packed8(as_ushort2(mxfp4x16.hi)) * (half)s;
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sub_group_barrier(CLK_LOCAL_MEM_FENCE);
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@@ -1,3 +1,5 @@
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#pragma OPENCL EXTENSION cl_khr_fp16 : enable
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#ifdef cl_intel_required_subgroup_size
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#pragma OPENCL EXTENSION cl_intel_required_subgroup_size : enable
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#define INTEL_GPU 1
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